1. Field of the Invention
The present invention relates to clock and data recovery (CDR) technology, more particularly to CDR technology for a signal transmission system.
2. Description of the Related Art
In many serial transmission systems, such as those that utilize USB, USB2.0, PCI-Express I and II, Serial-ATA I and II, and DisplayPort interfaces, a transmitter first combines a clock signal and data into an encoded signal for transmission, then a receiver analyzes the received encoded signal using a clock and data recovery (CDR) circuit so as to obtain a recovery clock having a frequency and a phase synchronous with the transmitter clock, thereby allowing the transmitted data to be accurately decoded.
Hence, whether or not a receiver can accurately decode received signals is determined by the recovery clock. Conventionally, a circuit for confirming a recovery clock utilizes a clock having a fixed frequency, such as a crystal clock, to assist in confirmation. Such confirmation involves first measuring the number of cycles of the crystal clock and the number of cycles of the recovery clock within a predetermined time period, and then determining whether the frequency of the recovery clock falls within a reasonable range of the clock in the transmitter. For example, with reference to FIG. 1, there are an x-number of crystal clock cycles (Tx) and a y-number of transmitter clock cycles within a predetermined time period (P). If a z-number of recovery clock cycles in the predetermined time period (P) is larger than (y), this indicates that the frequency of the recovery clock (z/(xTx)) is too high and must be decreased. On the other hand, if the z-number of recovery clock cycles in the predetermined time period (P) is smaller than (y), this indicates that the frequency of the recovery clock (z/(xTx)) is too low, and must be increased.
However, through use of such a technique, it may only be determined whether the frequency of the recovery clock falls within a reasonable range, and it is not possible to effectively confirm whether the recovery clock is accurately locked so as to realize synchronized frequency and phase.